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<br />puncfied paper tape reader that reads 350 char- S Register (12 bits): functio�s as tlie storage address :
<br />: acters per second; and the Teletype high-speed register: Prior to any storage refezence, the �ddress
<br />paper tape `punch that operates at 60 characters word is entered in S. The contents _of S are then ;
<br />per second. Optional input-output equipment in- used to select the storage location involved xn'the
<br />cludes 'an on-line electric typewriter, up to 8 reference.
<br />magnetic tape handlers (Ampex FR-300 handlers
<br />: that operate: at 30KC character rate or Ampex F Register (6 bits) : holds the upper six � bits of; an
<br />FR-400 handlers that operate at 15KC character instruction word, i.e., the function code, thr�ugh �•':
<br />rate), card reader-punch units, and line printer. out the e�ecution of an instruction. The execution :°
<br />.� � InpuY-output transmissions are either a single of an instruction is under the ' control of' the '�!.
<br />,
<br />, 6-bit or 7-bit character, �or a 12-bit word. quantity in F.
<br />r � � � � • IV-Addressing Modes
<br />III Descr�ption of Registers
<br />The 160 Computer contains three operational rn the direct addressing mode ;(d), . the address refers '
<br />i to a 12-bit operand in one of tlie: first 64 stor.�ge �
<br />registers: A, `. Z, and P. The contents of these
<br />r2 '' registers, are shown in arabic numerals (octal 1Qcations.
<br />� notation) on the .control panel of the computer. -� `�
<br />; s There are also three transient registers: B,- F, Indirect' addressing (i) provides for operand refer �
<br />,�� and S: These registers are described below; a ences and jump addresses. Whexe ind�rect adclress '-
<br />` `` block diagrarn of the 160 Compuxer is shown ing is used with an instruction, E xe fezs;to o�e o�
<br />`t , ,
<br />` � in Figure 1. the first , 64 's�orage locations, , the : contents'; of ',
<br />'" this register are then read' out' and used as ;�the :
<br />,�� , �� � �� , ;
<br />5 , . p address of the o erand or as the urn address. �:
<br />! � � p. Register (12 bits): princi al arithmetic register. For P � p
<br />mos� arithmetic operations, A, operates as a 12- ` � ;
<br />�� ' bzt subtractive aecumulator. 'p'he quantity zero Relative addressing provides for oper�nd a�dresses �„
<br />$�J is represented by all zeros. and jump addresses that. are in�: the ii�medtate' ;
<br />+, ,,. vicinity .of the storage location which cantatns `�t�e �;
<br />' curren� instruction. Tn xelative"addressing forward ;
<br />,� g` (f), the E portion is added to che curren� contents '
<br />Z Re ister (12 �its): pez�forms severaYfunctions. O�ze, , „
<br />a� it serves as a buffer register for storage. In this af the program controi , iegister P.?�hus, :4he ;
<br />��' ,,.', capacity, it receives the :ward read out of storage operand :or jump address is.;one.:of the 63 Sto�age�� ;
<br />`��t j', and holds the word to; be, written into storage. location"s ' immediately .preceding ;the address � o�� ;{;
<br />`� 4 , Also, ,for addition. and: subtractian operations; the current instruction. A.n. exceptton �is �e =ln�� ;
<br />�°t R
<br />�, t ,,, �the contents of . t�e Z;register are added to or direct Jump (�, m which the junig a�dd�ress is read �
<br />` �: subtractzd from th'e coritents of A. from the address found when the: Conterits of P': a're' �
<br />�. S added ta E. `; ,
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<br />4 '� ' � � '
<br />. . . , .'. .,' �� - �.. , - . ��.: .
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<br />. , , �� � - . r r ,
<br />�t � � ��' ':' �' '�. ... :. .. �, �'� � �..
<br />`5 � � P. Register, tX2 6its): program control register. Its � �,
<br />;�; ,' ` cantents axe the address of the current instruction, In the. n� address mod� (n), constants ar� stoxed +, ;
<br />�`� ` ` ' � in the address , portion of the uistrucrion '�'bie, E
<br />� � � , At tk�e �:beginning of each ;instruction, the contents : „ , � ;
<br />�fu ,�d� , artion of th� instruction is not used as aza. address. ,
<br />�� of P az�e iacireased by ane to provide tlie address :. P.
<br />�'� � � of the inst�uction; ,a jump address is entered in P instead,.it is used as a;6 bit operanci 'This oper�a►n,d k,
<br />����; ,�" �� � ii a Jump is called for. . is automati�cally extendec� to 12 bits,;; with �,the
<br />�ra �. � �. �,: . . : y< ,' ` ..: � al�u ��.,.
<br />,, upper , six bits �: being �eros With this fe r�, .
<br />�'<' � ' ` # arithmetic and �:logical � operarioins:� can be cairci�d � -'
<br />��f +t4� .. � �..' '�' . •,., �� �'. . '. �. , � .. .� .._ .. .. .. , :. .� ... �, _.�+ �� }
<br />�?, , z, B: �eg�ster (Y2; bits): auxiiiary arit�metic register. The out wiih a d-bit quant�ty contained in the u,st�tte'; ;
<br />���'` ` results `'oi ,arithmetic operations are first formeci tion. Thus th.e need fox- entering -;man� ;;constants ;_
<br />;�k�� r .," ,: . , , ,
<br />,a .
<br />�>d � in �3, then -transmitted_ to :the: A, Z, or S registers. into memary is elimivated. ' �; ;
<br />��F�1� F � ; i
<br />� ? r t � t c �'
<br />�� > ic�F�� ., ,
<br />x , t
<br />�� �� � . . . r , a ,.
<br />+ � S
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<br />5[�t.�.i -. 1 � � ��� �.
<br />T� 4iN24'. � . . � � � . 1
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<br />��( Yµry9��'+ Yn a t ` 1{' S
<br />#hi11 ��5 h 2-+ i� � y i �� . t: t \L �vl`1 j 111;
<br />��k�� ti 1 � . � � � . .
<br />���itJ� 112 � -a r,� i � �.� ���.�.� c�:,
<br />�� t 1
<br />�+r �� .. t �Jt 5 5 .� � � ��. . � C tA, a _
<br />� - � � t i14� t. i �5q�vd
<br />9 b�`y y k: d � 1 a . , � : �. � : J � ,- �i �. +��L«� ����(+-'i7,�
<br />��r1�4ti} f .1�1 n �;� -�� 7i � �i , ... . ., "' .,.� � , ., . . ... , � ,. ,",�, .. � r.i.t+ri �`��_5-.r i .`'S16`ri3,�"L4
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