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: ;: . , ,; � : <br /><:-. r � � a � <br />-. ` <br />, . ,,. . <br />; ;�, <br />EX PLA NAiI Q N 0� R E� I STE RS *P'�e�'��er Functions as tlie program' addre� <br />count�r. Provides continuity between individua <br />steps of program by generating the addr�sses a;a <br />which individual steps are coritained. Upvn'compte <br />tion of each sequential step, count in P i� advance� <br />by one to specify address of next step. Jurrip'ins�ruc <br />tions clear P and enter new address ;in it: '; ;��� <br />*Index Registers, B'-B6 Provide modification i <br />execution addresses in`program loops. Cont�nts of;'a <br />Tndex_ Registcr can be advanced each pass;'throug <br />j a lo��p, with an e.xit initiated on a given thresholc <br />*A�-Register Principal arithmetic register. I'unc- ' ` <br />tions as a 48-bit accumulator in most arithmetic Altc ��ate approach allo�vs an Index. �.eg�ster to ;� <br />bperatians. Quantity zero represented by a binary <br />p�eset, then reduced by one count each pass throug <br />� the program—with an exit after �zero. <br />zero in each stage. Contents of A may be shifted - <br />� either tb�the right or left. Shifting may involve only Storage Address Registers, S'=S� Represei <br />;the contents of A or may include tlie contents of Q. even and odd 16,384-word memory unrts r�spei <br />�� Leftmost sign bit extended on shifts to right; bits tively. Receive addresses of instruetions from P an <br />� + :;shifted oi�' the right end of A or Q are dropped. Left adclresses of operands from U2: ��_-, <br />�, `., ,sliifts are circular, with lower order bits being_re- Storage Restorafion Registe�s, Z'-Z� ' Represe�i <br />placed by higher order bits. Mulfiiply, divide, and <br />;�',� eve.n and odd 16, 384-word memory units respei <br />r} ` floating p�int instrucfions are sequenced operations tivcly. Hold the 48-bit word to be written in a v� <br />� �' <br /><< invalving bot h A a�d Q. storage location. <br />�� � *Q-Register Assists accumulator in performing �� <br />R-Register Functions as exchange register 'fi <br />{�,�, ' more complicaled arithmetic aperations. Used with transmission involving B-Index Registers. Used; i <br />� A�o perform double precision arithmetic. Q may be <br />`� �t aclvancing or reducing count in a given B�Registe <br />'��F' �-shifted �•ight or left, singly or in conjunction with A. During scvcral insfructions, used to 4ount repefiiti� <br />ti;,; Q.also contains mask, in logical aperatian. ` ° `� <br />, f4 ,: operations. � usecl with fioating point �nstru�tioi <br />`� `�: " program; �ontrol Regi�ter, U� Holds program step in performing arithmetic operations ori the c�cp� <br />��'� `wliile the two.instructions cantained in it are exccut- nent or eharacteristic. <br />`° ;ed. The 48-bit instruction word taken from storage .' <br />�{ ' X-Regi�ter An exchan�;e anci' auxil�ary arithixi <br />� location specified uy P and entered in U', the upper tic registe��. All input-ou��put data passe� �hrougl� : <br />�;� Y instruction being executed first. Execution of lower � -: ;,s; <br />s�ts, , • <br />�� �� �_ ;instructio� follows, except when upper instruction Externa! Funetion R�g�sier, 0° ` Used for e. <br />�s�� �� j, :�s a, jump or when it p�•ovicics for conditional skip- changing cantrol infarmation with' inr�ut outpi <br />� y` � in ; of low�r ins�:ruction. equipmcnt. <br />P � �, <br />�,, { �' ` ; ; : <br />k��,y'p`h .� ' ': ,Auxil,i�iry Program Control R�gi�ter, U' An ac- t�utput Register�, 0' fhrough t�'' .'UL through' <br />����x4,6r Y + ..',. ' . . � . .- . � . e -- . . <br />�4�.,,�.x�� , `,�umulator' used: irr the inodifica�ion of execution used for output kiuH'er operatio�is where; datat� <br />,, ; <br />�,��� j = , .. <br />��,w,, ,;� address of current instruction. This modification trans�7�i�t�d at spe�d of input; output �qu�.pmer <br />��`i1�°� � <br />J -4c c ^ � , . , , ; . � .. <br />[��� ;� ,, '� �onsists o#' `addin� �contents of a�; Xndex Register: to Wlier� high-speed transfer is�rec�uireci, nutpi��` tr�%r. <br />� f�'` 4 : ex�cutian address of current instruction. fer operations carried out via Q�. :, <br />F��''+� `4 "it S <br />���JK`�: , ,.., *O��ralional Regfsters �_�� <br />,;� <br />c �i� ;a rf :�r <br />r��'+ `t�„ r , � <br />��fi� t <br />3��� ;. . ,` c <br />�4C��� 1 � •�;: <br />��`��.,�27v'a°� lv 1 � _ . � �� '2 <br />.i y <br />> rn t � ��+ c <br />� i � 4 St <br />� ��'' _�4 , ��a a ,� � ,��r�; <br />�T�x���� i' f_s i� i . iy" 4 r1 ��, � <br />.�' t � � r � � 4, <br />��� �y� s� k <br />� <br />, 'S i,l <br />� <br />i} z�`�1 31��11 .t u y�� i: �\ 1� � � � r 4h,r/v�j� <br />��<<', F t� � � . e i � �� t 1 t�w�'' �i- ttF� Y1F��� i�'�1 <br />���,�`.i,���::?�riS� �i�. <,��w_, r'�, .. �. � � �4�. ,. .,. _ „ ,. .. ,. .., . , . i � . � , .. , . .. . . . , , � . `._.� ,... �`,t � .� �'::� ., v .�.ln.�'''.,.. i�U.�vtr,�,:�`�1 <br />